2 results for tags
CRC x
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dram's blog
The article about implementing the Ascon algorithm on an hp16 was mentioned on the museum of HP forum https://www.hpmuseum.org/forum/thread-24733.htmlMon Feb 23 08:40:44 2026 - permalink -
Other articles such as https://dram.page/p/crc-tricks/ and https://dram.page/p/heyting-algebra are interesting too.
The latter was rendered by
pandoc --mathjax -f markdown-smart < heyting.md > index.html
from its markdown source.- https://dram.page/p/ascon-hp16c/
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Intel(R) Intelligent Storage Acceleration Library
ISA-L is a collection of optimized low-level functions targeting storage applications. ISA-L includes:Mon Jun 15 15:26:37 2020 - permalink -
Erasure codes - Fast block Reed-Solomon type erasure codes for any encode/decode matrix in GF(2^8).
CRC - Fast implementations of cyclic redundancy check. Six different polynomials supported.
iscsi32, ieee32, t10dif, ecma64, iso64, jones64.
Raid - calculate and operate on XOR and P+Q parity found in common RAID implementations.
Compression - Fast deflate-compatible data compression.
De-compression - Fast inflate-compatible data compression.
BSD 3-Clause "New" or "Revised" License.
According to https://github.com/catid/cm256, ISA-L uses a O(N^3) Gaussian elimination solver for decoding. The CM256 decoder solves the linear system using a fast O(N^2) LDU-decomposition algorithm from "Pivoting and Backward Stability of Fast Algorithms for Solving Cauchy Linear Equations" (T. Boros, T. Kailath, V. Olshevsky), which was hand-optimized for memory accesses.
See also https://github.com/catid/leopard for a fast O(N log(N)) RS erasure decoder.- https://github.com/intel/isa-l