interesting links2023-12-25T11:27:25+01:00https://roland.iwasno.net/links/https://roland.iwasno.net/links/https://roland.iwasno.net/links/Information about Oberonhttps://roland.iwasno.net/links/?yC5OGA2023-12-25T11:27:25+01:00Mentioned on the Oberon mailing list <a href="https://lists.inf.ethz.ch/pipermail/oberon/2022/016530.html" rel="nofollow">https://lists.inf.ethz.ch/pipermail/oberon/2022/016530.html</a><br>(<a href="https://roland.iwasno.net/links/?yC5OGA">Permalink</a>)Dave Anderson's bloghttps://roland.iwasno.net/links/?Er2A0g2022-05-09T14:07:28+02:00Found via <a href="https://minnie.tuhs.org/pipermail/tuhs/2022-May/025784.html" rel="nofollow">https://minnie.tuhs.org/pipermail/tuhs/2022-May/025784.html</a><br>(<a href="https://roland.iwasno.net/links/?Er2A0g">Permalink</a>)open source FPGA toolshttps://roland.iwasno.net/links/?x1P_9w2021-04-09T17:49:28+02:00SymbiFlow is a fully open source toolchain for the development of FPGAs of multiple vendors. Currently, it targets the Xilinx 7-Series, Lattice iCE40, Lattice ECP5 FPGAs, QuickLogic EOS S3 and is gradually being expanded to provide a comprehensive end-to-end FPGA synthesis flow.<br>(<a href="https://roland.iwasno.net/links/?x1P_9w">Permalink</a>)Home · MiSTer-devel/Main_MiSTer Wiki · GitHubhttps://roland.iwasno.net/links/?MJZcMg2021-02-05T21:36:32+01:00MiSTer is an open project that aims to recreate various classic computers, game consoles and arcade machines, using modern hardware. It allows software and game images to run as they would on original hardware, using peripherals such as mice, keyboards, joysticks and other game controllers.<br />
Found via the TUHS mailing list<br />
<a href="https://minnie.tuhs.org/pipermail/tuhs/2021-February/023014.html" rel="nofollow">https://minnie.tuhs.org/pipermail/tuhs/2021-February/023014.html</a><br>(<a href="https://roland.iwasno.net/links/?MJZcMg">Permalink</a>)The J1 Forth CPU — excamerahttps://roland.iwasno.net/links/?019eQg2018-06-28T18:18:51+02:00J1 is a small (200 lines of Verilog) stack-based CPU, intended for FPGAs. A complete J1 with 16Kbytes of RAM fits easily on a small Xilinx FPGA. Some highlights:<br />
Extremely high code density. A complete system including the TCP/IP stack fits in under 8K bytes.<br />
Single cycle call, zero cycle return<br />
Instruction set maps trivially to Forth<br />
Cross compiler runs on Windows, Mac and Unix<br />
Basic software includes a sizeable subset of ANS Forth and a portable TCP/IP networking stack.<br>(<a href="https://roland.iwasno.net/links/?019eQg">Permalink</a>)w11: PDP-11/70 CPU and SoChttps://roland.iwasno.net/links/?iDeK7g2018-05-14T11:31:23+02:00The project contains the VHDL code for a complete DEC PDP-11 system: a PDP-11/70 CPU with memory management unit, but without floating point unit, a complete set of mass storage peripherals (RK11/RK05, RL11/RL02, RK70/RP06, TM11/TU10) and a basic set of UNIBUS peripherals (DL11, LP11, PC11), and last but not least a cache and memory controllers for SRAM and PSRAM.<br />
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The design is FPGA proven, runs currently on Digilent Cmod A7 , Arty , Basys3 , Nexys4 DDR , Nexys4 , Nexys3 , Nexys2 and S3board boards. See section Complete Systems for more information.<br />
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5th Edition UNIX, 7th Edition UNIX, and 2.11BSD UNIX are known to boot, the hardware should also support DEC RT11 and RSX-11M, see section Running Systems for more information.<br />
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This is a retrocomputing project, rebuilding hardware from the late 70s and running historical software. To get into the tune see Figure D-1, a 11/70 console, and Figure F-2, a baseline system setup.<br>(<a href="https://roland.iwasno.net/links/?iDeK7g">Permalink</a>)OberonStation - The Oberon computing platformhttps://roland.iwasno.net/links/?NP6rTA2016-03-25T20:27:12+01:00OberonStation™ is a self-contained FPGA-based, 32-bit computer designed specifically to run Oberon RISC, as described by Profs. Niklaus Wirth and Jürg Gutknecht in Project Oberon (New Edition 2013).<br />
<a href="http://www.projectoberon.com/" rel="nofollow">http://www.projectoberon.com/</a><br>(<a href="https://roland.iwasno.net/links/?NP6rTA">Permalink</a>)snickerdoodle: Create Something Different | Crowd Supplyhttps://roland.iwasno.net/links/?aKQU8A2016-03-22T13:46:11+01:00A palm-sized, reconfigurable Linux computer that connects to the real world: ARM + FPGA (Zynq) + Wi-Fi + Bluetooth + 154 I/O<br>(<a href="https://roland.iwasno.net/links/?aKQU8A">Permalink</a>)TE0726 "ZynqBerry"https://roland.iwasno.net/links/?5_qDPg2016-03-22T12:42:44+01:00The Trenz Electronic TE0726 is a Rasberry Pi compatible FPGA module integrating a Xilinx Zynq-7010, 4 USB ports, an Ethernet port and 16 MByte Flash memory for configuration und operation.<br>(<a href="https://roland.iwasno.net/links/?5_qDPg">Permalink</a>)Homemade GPS Receiverhttps://roland.iwasno.net/links/?h8P7Yw2013-06-26T09:51:23+02:00Fairly detailed description of a GPS receiver using 1-bit quantisation, down-conversion, despreading and tracking in an FPGA. The tracking loops are implemented in firmware on a custom Forth-based processor (in the same FPGA), the navigation solution is computed in a Raspberry π (<a href="http://www.raspberrypi.org/archives/3916" rel="nofollow">http://www.raspberrypi.org/archives/3916</a>).<br>(<a href="https://roland.iwasno.net/links/?h8P7Yw">Permalink</a>)